Microelectronic assemblies having substrate-integrated perovskite layers
US11302618B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2018 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Aug 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N30/302
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are microelectronic assemblies with integrated perovskite layers, and related devices and methods. For example, in some embodiments, a microelectronic assembly may include an organic package substrate portion having a surface with a conductive layer, and a perovskite conductive layer on the conductive layer. In some embodiments, a microelectronic assembly may include an organic package substrate portion having a surface with a conductive layer, a perovskite conductive layer having a first crystalline structure on the conductive layer, and a perovskite dielectric layer having a second crystalline structure on the perovskite conductive layer. In some embodiments, the first and second crystalline structures have a same orientation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.