Patent · US Active

On-chip capacitors in three-dimensional semiconductor devices and methods for forming the same

US11302627B1 · kind B1 · utility

2Cited by

4References

20Claims

0Family size

Assignee

YANGTZE MEMORY TECHNOLOGIES CO., LTD. · CN

Inventors

Liang Chen · 红钢城街道, CN
Wei Liu · 红钢城街道, CN
Lei Xue · 红钢城街道, CN

Key dates

Filing date	Oct 21, 2020
Grant date	Apr 12, 2022
Priority date	—
Expiry date	Oct 21, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH10B43/27
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Embodiments of three-dimensional (3D) semiconductor devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory stack, an isolation structure, and a plurality of capacitor contacts. The memory stack includes vertically interleaved conductive layers and first dielectric layers. The isolation structure extends vertically through at least part of the memory stack to electrically separate the conductive layers into gate electrodes in a core array region and capacitor electrodes in a dummy staircase region. The plurality of capacitor contacts are in contact with at least two of the capacitor electrodes in the dummy staircase region, respectively.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.