Modular stacked silicon package assembly
US11302674B2 · kind B2 · utility
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2References
20Claims
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Assignee
Inventors
Key dates
| Filing date | May 21, 2020 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | May 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package assembly and method for fabricating the same are provided that provide a modular chip stack that can be matched with one or more chiplets. The use of chiplets enables the same modular stack to be utilized in a large number of different chip package assembly designs, resulting much faster development times at a fraction of the overall solution cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.