Method for making semiconductor device including a superlattice with different non-semiconductor material monolayers
US11302823B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2020 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Feb 26, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6757
Abstract
A method for making a semiconductor device may include forming a superlattice on a semiconductor substrate and including a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A first at least one non-semiconductor monolayer may be constrained within the crystal lattice of a first pair of adjacent base semiconductor portions and comprise a first non-semiconductor material, and a second at least one non-semiconductor monolayer may be constrained within the crystal lattice of a second pair of adjacent base semiconductor portions and comprise a second non-semiconductor material different than the first non-semiconductor material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.