Interface circuitry for exchanging information with master, home, and slave nodes using different data transfer protocols
US11314675B2 · kind B2 · utility
5Cited by
0References
8Claims
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Key dates
| Filing date | Oct 22, 2019 |
| Grant date | Apr 26, 2022 |
| Priority date | — |
| Expiry date | Oct 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system comprises a master node to initiate data transmissions; one or more slave nodes to receive the data transmissions; and a home node to control coherency amongst data stored by the data processing system; in which at least one data transmission from the master node to one of the one or more slave nodes bypasses the home node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.