Symmetric arrangement of field plates in semiconductor devices

US11316019B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Johnatan A. Kantarovsky · South Burlington, US
• Rajendran Krishnasamy · South Burlington, US
• Siva P. Adusumilli · South Burlington, US
• Steven Bentley · Menands, US
• Michael J. Zierak · Colchester, US
• Jeonghyun Hwang · Ithaca, US

Key dates

• Filing date: Jul 29, 2020
• Grant date: Apr 26, 2022
• Expiry date: Aug 6, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/513

Abstract

The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor devices having field plates that are arranged symmetrically around a gate. The present disclosure provides a semiconductor device including an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region and laterally between the source and drain electrodes, a first field plate between the source electrode and the gate, a second field plate between the drain electrode and the gate, in which the gate is spaced apart laterally and substantially equidistant from the first field plate and the second field plate.