Power-gating techniques with buried metal
US11322197B1 · kind B1 · utility
1Cited by
1References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 21, 2020 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Oct 21, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various implementations described herein are related to a device having wordline drivers coupled to a core array. The device may have backside power network with buried power rails. The device may have header logic coupled to power supply connections of the wordline drivers by way of the buried power rails, and the header logic may be used to power-gate the wordline drivers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.