Patent · US Active

Lithographic cavity formation to enable EMIB bump pitch scaling

US11322444B2 · kind B2 · utility

1Cited by

0References

16Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Kristof Darmawikarta · Chandler, US
Hiroki Tanaka · Osaka, JP
Robert Alan May · Chandler, US
Sameer Paital · Chandler, US
Bai Nie · Chandler, US
Jesse C. Jones · Chandler, US
Chung Kwang Christopher Tan · Chandler, US

Key dates

Filing date	Mar 23, 2018
Grant date	May 3, 2022
Priority date	—
Expiry date	Sep 1, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/381
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.