Environment control apparatus and chip testing system
US11327111B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2020 |
| Grant date | May 10, 2022 |
| Priority date | — |
| Expiry date | Dec 15, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2877
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A chip testing system and an environment control apparatus are provided. The chip testing system includes the environment control apparatus, a central control device, and a chip testing device. The environment control apparatus includes an apparatus body and a pressing device. When the chip testing device is disposed in an accommodating chamber of the apparatus body, and the central control device controls the pressing device to press a plurality of side surfaces of a plurality of chips carried by the chip testing device, the central control device controls the chip testing device to perform a testing operation to the chips. After the chip testing device performs the testing operation to the chips, a plurality of movable members of the pressing device protrude from a contacting surface of the pressing device and push the chips to separate the chips and the contacting surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.