Patent · US Active

Self-timed sensing architecture for a non-volatile memory system

US11328752B2 · kind B2 · utility

0Cited by
4References
8Claims
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Key dates

Filing dateNov 11, 2020
Grant dateMay 10, 2022
Priority date
Expiry dateNov 11, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/21
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A self-timed sensing architecture for reading a selected cell in an array of non-volatile cells is disclosed. The sensing circuitry generates a signal when a stable sensing value has been obtained from the selected cell, where the stable sensing value indicates the value stored in the selected cell. The signal indicates the end of the sensing operation, causing the stable sensing value to be output as the result of the read operation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.