Massimiliano Frulio
21Patents
7h-index
22Co-inventors
65Inventor score
Filing activity: Apr 3, 2003 → Nov 11, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7579902B2 | Charge pump for generation of multiple output-voltage levels | Electricity | 30 | Active |
| US7684245B2 | Non-volatile memory array architecture with joined word lines | Emerging Cross-Sectional Technologies | 26 | Active |
| US6831499B2 | Negative charge pump with bulk biasing | Electricity | 25 | Expired |
| US7436232B2 | Regenerative clock repeater | Physics | 25 | Active |
| US6906576B2 | High precision digital-to-analog converter with optimized power consumption | Electricity | 11 | Expired |
| US7158415B2 | System for performing fast testing during flash reference cell setting | Physics | 11 | Expired |
| US7049880B2 | High precision digital-to-analog converter with optimized power consumption | Electricity | 7 | Expired |
| US6771200B2 | DAC-based voltage regulator for flash memory array | Electricity | 7 | Expired |
| US7184311B2 | Method and system for regulating a program voltage value during multilevel memory device programming | Physics | 6 | Expired |
| US7522463B2 | Sense amplifier with stages to reduce capacitance mismatch in current mirror load | Physics | 5 | Active |
| US6954102B2 | Fast dynamic mirror sense amplifier with separate comparison equalization and evaluation paths | Physics | 5 | Expired |
| US7379338B2 | Method and system for regulating a program voltage value during multilevel memory device programming | Physics | 3 | Active |
| US7525856B2 | Apparatus and method to manage external voltage for semiconductor memory testing with serial interface | Physics | 2 | Active |
| US9489990B1 | Adaptive non-volatile memory programming | Physics | 1 | Active |
| US7269058B2 | System and method for preserving an error margin for a non-volatile memory | Physics | 1 | Expired |
| US7589572B2 | Method and device for managing a power supply power-on sequence | Physics | 1 | Active |
| US7430150B2 | Method and system for providing sensing circuitry in a multi-bank memory device | Physics | 0 | Expired |
| US7447071B2 | Low voltage column decoder sharing a memory array p-well | Physics | 0 | Active |
| US7301814B2 | System and method for avoiding offset in and reducing the footprint of a non-volatile memory | Physics | 0 | Expired |
| US11328752B2 | Self-timed sensing architecture for a non-volatile memory system | Electricity | 0 | Active |
| US7522002B2 | Biasing current to speed up current mirror settling time | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.