Method for manufacturing a magnetic random-access memory device using post pillar formation annealing
US11329217B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2019 |
| Grant date | May 10, 2022 |
| Priority date | — |
| Expiry date | Jan 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F10/3272
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a magnetic memory array provides back end of line annealing for associated processing circuitry without causing thermal damage to magnetic memory elements of the magnetic memory array. An array of magnetic memory element pillars is formed on a wafer, and the magnetic memory elements are surrounded by a dielectric isolation material. After the pillars have been formed and surrounded by the dielectric isolation material an annealing process is performed to both anneal the memory element pillars to form a desired grain structure in the memory element pillars and also to perform back end of line thermal processing for circuitry associated with the memory element array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.