Protocol level control for system on a chip (SOC) agent reset and power management
US11340671B2 · kind B2 · utility
2Cited by
27References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | May 24, 2022 |
| Priority date | — |
| Expiry date | Jul 14, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for consistently implementing reset and power management of IP agents on a System on a Chip (SoC). When IP agents undergo a reset, an individual negotiation takes placed between an interconnect and each IP agent over a link. Each IP agent can emerge from reset at its own time schedule, independently of the timing of the other IP agents. The interconnect may be configured as a proxy for any IP agent that is inoperable, including prior to reset, when in a power-down mode, or malfunctioning.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.