Chip testing device and chip testing system for testing memory chips
US11366155B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2020 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | Sep 23, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chip testing device and a chip testing system are provided. The chip testing system includes a chip testing device and a plurality of environment control apparatuses. A plurality of electrical connection sockets are disposed on one side of a circuit board, and a plurality of testing modules are disposed on another side of the circuit board. A first fixing member and a second fixing member fix the electrical connection sockets on one side of the circuit board, and no screwing members are required to be screwed between the electrical connection sockets and the circuit board. Each of the electrical connection sockets with a chip disposed thereon can be disposed in a high temperature environment or a low temperature environment for testing along with the chip testing device, so that each of the chips does not need to be detached repeatedly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.