Patent · US Active

Transistors with hybrid source/drain regions

US11374002B2 · kind B2 · utility

0Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 24, 2020
Grant dateJun 28, 2022
Priority date
Expiry dateJul 24, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/017

Abstract

Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A semiconductor substrate includes a first region, a second region, and a first source/drain region in the first region. A semiconductor fin is located over the second region of the semiconductor substrate. The semiconductor fin extends laterally along a longitudinal axis to connect to the first region of the semiconductor substrate. The structure includes a second source/drain region including an epitaxial semiconductor layer coupled to the first semiconductor fin, and a gate structure that extends over the semiconductor fin. The gate structure includes a first sidewall and a second sidewall opposite the first sidewall, the first source/drain region is positioned adjacent to the first sidewall of the gate structure, and the second source/drain region is positioned adjacent to the second sidewall of the gate structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.