Systems and methods for evaluating critical dimensions based on diffraction-based overlay metrology
US11378525B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 19, 2021 |
| Grant date | Jul 5, 2022 |
| Priority date | — |
| Expiry date | Feb 19, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Systems and methods for evaluating critical dimensions of a semiconductor device are provided. The semiconductor device includes a first layer comprising a first set of overlay markings and a second layer comprising a second set of overlay markings. The second layer is higher than the first layer. The first set of overlay markings includes a plurality of diffraction gratings. Each of the plurality of diffraction gratings has a first period. The second set of overlay markings includes a plurality diffraction grating clusters. Each of the plurality of diffraction grating clusters has a plurality of diffraction grating units. The plurality of diffraction grating units in at least one of the plurality of diffraction grating clusters have the first period. At least one of the plurality of diffraction grating units includes a diffraction grating having a second period that is smaller than the first period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.