Patent · US Active

Memory access bounds checking for a programmable atomic operator

US11379365B2 · kind B2 · utility

0Cited by

0References

24Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Tony M. Brewer · Plano, US
Dean E. Walker · Allen, US
Chris Baronne · Allen, US

Key dates

Filing date	Oct 20, 2020
Grant date	Jul 5, 2022
Priority date	—
Expiry date	Oct 20, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/1012
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Devices and techniques for memory access bounds checking for a programmable atomic operator are described herein. A processor can execute a programmable atomic operator with a base memory address. The processor can obtain a memory interleave size indicator corresponding to the programmable atomic operator and calculate a contiguous memory address range from the base memory address and the memory interleave size. The processor can then detect that a memory request from the programmable atomic operator is outside the contiguous memory address range and deny the memory request when it is outside of the contiguous memory address range and allow the memory request otherwise.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.