Inventor · Allen, TX, US

Dean E. Walker

40Patents
3h-index
21Co-inventors
63Inventor score

Filing activity: Oct 31, 2000 → Mar 27, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US7613183B1 System and method for router data aggregation and delivery Electricity 63 Expired
US6711357B1 Timing and synchronization for an IP router using an optical switch Electricity 31 Expired
US6894970B1 Router switch fabric protection using forward error correction Electricity 30 Expired
US11586443B2 Thread-based processor halting Physics 3 Active
US11294848B1 Initialization sequencing of chiplet I/O channels within a chiplet system Electricity 3 Active
US10430190B2 Systems and methods for selectively controlling multithreaded execution of executable code segments Physics 1 Active
US11488643B2 Method for configuring multiple input-output channels Physics 1 Active
US11507453B2 Low-latency register error correction Physics 1 Active
US11442858B1 Bias control for a memory device Physics 1 Active
US11379402B2 Secondary device detection using a synchronous interface Physics 1 Active
US12282800B2 Thread replay to preserve state in a barrel processor Emerging Cross-Sectional Technologies 0 Active
US12013788B2 Evicting a cache line with pending control request Physics 0 Active
US8315175B2 Router switch fabric protection using forward error correction Electricity 0 Active
US11669487B2 Secondary device detection using a synchronous interface Physics 0 Active
US12135987B2 Thread scheduling control and memory splitting in a barrel processor Physics 0 Active
US11392448B2 Payload parity protection for a synchronous interface Physics 0 Active
US12111770B2 Silent cache line eviction Physics 0 Active
US11734173B2 Memory access bounds checking for a programmable atomic operator Physics 0 Active
US11868300B2 Deferred communications over a synchronous interface Electricity 0 Active
US11960768B2 Memory-side cache directory-based request queue Physics 0 Active
US11953989B2 Low-latency register error correction Physics 0 Active
US11379365B2 Memory access bounds checking for a programmable atomic operator Physics 0 Active
US11914516B1 Memory side cache request handling Physics 0 Active
US12367148B2 Variable execution time atomic operations Physics 0 Active
US11940919B2 Recall pending cache line eviction Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.