Semiconductor structure formation

US11387369B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Shen Hu · Boise, US
• Hung-Wei Liu · Jinshanmian, TW
• Xiao Li · Yardley, US
• Zhiqiang Xie · Fuzhou, CN
• Corey Staller · Boise, US
• Jeffery B. Hull · Boise, US
• Anish A. Khandekar · Boise, US
• Thomas A. Figura · Boise, US

Key dates

• Filing date: Dec 20, 2019
• Grant date: Jul 12, 2022
• Expiry date: Mar 3, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/32
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An example apparatus includes forming a working surface of a substrate material. The example apparatus includes trench formed between two semiconductor structures on the working surface of the substrate material. The example apparatus further includes access lines formed on neighboring sidewalls of the semiconductor structures opposing a channel region separating a first source/drain region and a second source/drain region. The example apparatus further includes a time-control formed inhibitor material formed over a portion of the sidewalls of the semiconductor structures. The example apparatus further includes a dielectric material formed over the semiconductor structures to enclose a non-solid space between the access lines.