Inventor · Jinshanmian, TW

Hung-Wei Liu

45Patents
3h-index
53Co-inventors
66Inventor score

Filing activity: Feb 13, 2001 → Nov 29, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US9074754B2 Light source module Electricity 4 Active
US10446681B2 NAND memory arrays, and devices comprising semiconductor channel material and nitrogen Electricity 4 Active
US11112684B2 Projection apparatus with illumination system having plurality of laser modules Physics 3 Active
US11688808B2 Transistor and methods of forming integrated circuitry Electricity 2 Active
US11024736B2 Transistor and methods of forming integrated circuitry Electricity 2 Active
US8993446B2 Method of forming a dielectric film Electricity 1 Active
US9709244B2 Light-source module Physics 1 Active
US9349608B2 Methods of protecting a dielectric mask layer and related semiconductor devices Electricity 1 Active
US8716150B1 Method of forming a low-K dielectric film Electricity 1 Active
US9157603B2 Light emitting unit with reflector for uniform light emission Electricity 1 Active
US11506962B2 Illumination system and projection device Electricity 1 Active
US9093560B2 Gate height uniformity in semiconductor devices Electricity 1 Active
US11022867B2 Illumination system having wavelength conversion device and projection device having the same Physics 1 Active
US11264395B1 Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry Electricity 1 Active
US9297518B2 Backlight module Physics 0 Active
US11683937B2 On-die formation of single-crystal semiconductor structures Electricity 0 Active
US11720009B2 Illumination system and projection device Physics 0 Active
US9418832B2 Method of forming a dielectric film Electricity 0 Active
US6503832B2 Application of controlling gas valves to reduce particles from CVD process Emerging Cross-Sectional Technologies 0 Expired
US11387369B2 Semiconductor structure formation Electricity 0 Active
US12191354B2 Vertical transistors having at least 50% grain boundaries offset between top and bottom source/drain regions and the channel region that is vertically therebetween Electricity 0 Active
US9224318B2 Light source module Physics 0 Active
US12432928B2 Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry Electricity 0 Active
US7314796B2 Methods for reducing wordline sheet resistance Electricity 0 Expired
US10854747B2 NAND memory arrays, devices comprising semiconductor channel material and nitrogen, and methods of forming NAND memory arrays Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.