Direct attachment of capacitors to flip chip dies
US11404365B2 · kind B2 · utility
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20References
8Claims
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Key dates
| Filing date | May 7, 2019 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | May 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19104
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package includes a substrate, a flip chip die, and a capacitor. The flip chip die is attached to the substrate via die-to-substrate interconnects. The capacitor is attached to the flip chip die via capacitor-to-die interconnects so that the capacitor occupies a region between the flip chip die and the substrate. Such placement of the capacitor on a flip chip die has the advantage of reducing the distance between the capacitor and its core, thereby reducing unwanted line inductance and series resistance effects. Integrated circuit performance is thereby enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.