Intelligent memory wear leveling
US11409443B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2021 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Feb 17, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device including, in one implementation, a non-volatile memory device and a controller coupled to the non-volatile memory device. The non-volatile memory device includes a memory block. The controller is configured to receive a cycle operation request and perform a wear-level mitigation operation in response to receiving the cycle operation request. To perform the wear-level mitigation operation, the controller is configured to determine a read state condition of the memory block, perform the requested cycle operation, and increment a cycle count of the memory block by a value based on the determined read state condition of the memory block. The first read state of the memory block and the second read state of the memory block are based on a wordline voltage that is associated with the memory block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.