LDMOS finFET structure with buried insulator layer and method for forming same
US11410998B2 · kind B2 · utility
0Cited by
7References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2020 |
| Grant date | Aug 9, 2022 |
| Priority date | — |
| Expiry date | Jun 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/611
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit (IC) structures including buried insulator layer and methods for forming are provided. In a non-limiting example, a IC structure includes: a substrate; a first fin over the substrate; a source region and a drain region in the first fin; a first gate structure and a second gate structure over the first fin, the first and the second gate structures positioned between the source region and the drain region; and a buried insulator layer including a portion disposed under the first fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.