Method for preparing semiconductor device with air gap structure
US11417667B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 22, 2020 |
| Grant date | Aug 16, 2022 |
| Priority date | — |
| Expiry date | Feb 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present application discloses a method for preparing a semiconductor device with an air gap structure between conductive structures. The method includes: forming a first bit line, a second bit line, a first capacitor contact and a second capacitor contact over a semiconductor substrate, wherein the first capacitor contact and the second capacitor contact are disposed between the first bit line and the second bit line; forming a first dielectric layer over a sidewall of the first bit line, a sidewall of the second bit line, a sidewall of the first capacitor contact and a sidewall of the second capacitor contact such that an opening is formed and surrounded by the first dielectric layer; filling the opening with a dielectric structure; and removing the first dielectric layer to form an opening structure surrounding the dielectric structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.