Gate-all-around integrated circuit structures including varactors

US11417781B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ayan Kar · Portland, US
• Saurabh Morarka · Hillsboro, US
• Carlos Nieva-Lozano · Beaverton, US
• Kalyan C. Kolluru · Portland, US
• Biswajeet Guha · Hillsboro, US
• Chung-Hsun Lin · White Plains, US
• Brian J. Greene · Wappingers Falls, US
• Tahir Ghani · Portland, US

Key dates

• Filing date: Mar 25, 2020
• Grant date: Aug 16, 2022
• Expiry date: May 22, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/364
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Gate-all-around integrated circuit structures including varactors are described. For example, an integrated circuit structure includes a varactor structure on a semiconductor substrate. The varactor structure includes a plurality of discrete vertical arrangements of horizontal nanowires. A plurality of gate stacks is over and surrounding corresponding ones of the plurality of discrete vertical arrangements of horizontal nanowires. The integrated circuit structure also includes a tap structure adjacent to the varactor structure on the semiconductor substrate. The tap structure includes a plurality of merged vertical arrangements of horizontal nanowires. A plurality of semiconductor structures is over and surrounding corresponding ones of the plurality of merged vertical arrangements of horizontal nanowires.