Determining page size via page table cache
US11422947B2 · kind B2 · utility
1Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2020 |
| Grant date | Aug 23, 2022 |
| Priority date | — |
| Expiry date | Aug 12, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/68
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A page directory entry cache (PDEC) can be checked to potentially rule out one or more possible page sizes for a translation lookaside buffer (TLB) lookup. Information gained from the PDEC lookup can reduce the number of TLB checks required to conclusively determine if the TLB lookup is a hit or a miss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.