ReRAM structure and method of fabricating the same
US11424408B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2021 |
| Grant date | Aug 23, 2022 |
| Priority date | — |
| Expiry date | Jul 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
An ReRAM structure includes a dielectric layer. A first ReRAM and a second ReRAM are disposed on the dielectric layer. The second ReRAM is at one side of the first ReRAM. A trench is disposed in the dielectric layer between the first ReRAM and the second ReRAM. The first ReRAM includes a bottom electrode, a variable resistive layer and a top electrode. The variable resistive layer is between the bottom electrode and the top electrode. A width of the bottom electrode is smaller than a width of the top electrode. The width of the bottom electrode is smaller than a width of the variable resistive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.