Patent · US Active

Gate all around structure with additional silicon layer and method for forming the same

US11430891B2 · kind B2 · utility

1Cited by
16References
20Claims
0Family size

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Inventors

Key dates

Filing dateSep 16, 2019
Grant dateAug 30, 2022
Priority date
Expiry dateNov 12, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/0133
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Methods for manufacturing a semiconductor structure is provided. The method for manufacturing the semiconductor structure includes forming nanowire structures over a substrate and forming a gate structure across nanowire structures. The method for manufacturing the semiconductor structure also includes forming a source/drain structure adjacent to the gate structure and forming a Si layer over the source/drain structure. The method for manufacturing the semiconductor structure also includes forming a SiGe layer over the Si layer and oxidizing the SiGe layer to form an oxide layer. The method for manufacturing the semiconductor structure also includes forming a contact through the Si layer over the source/drain structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.