Chen-Han Wang
26Patents
2h-index
24Co-inventors
53Inventor score
Filing activity: Jan 15, 2014 → Jan 24, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10438948B2 | Method and device of preventing merging of resist-protection-oxide (RPO) between adjacent structures | Electricity | 3 | Active |
| US11296187B2 | Seal material for air gaps in semiconductor devices | Electricity | 3 | Active |
| US11688766B2 | Seal material for air gaps in semiconductor devices | Electricity | 1 | Active |
| US11264485B2 | Spacer structure for semiconductor device | Electricity | 1 | Active |
| US12119404B2 | Gate all around structure with additional silicon layer and method for forming the same | Electricity | 1 | Active |
| US11430891B2 | Gate all around structure with additional silicon layer and method for forming the same | Electricity | 1 | Active |
| US11626482B2 | Air spacer formation with a spin-on dielectric material | Emerging Cross-Sectional Technologies | 0 | Active |
| US11735666B2 | Gate all around structure with additional silicon layer and method for forming the same | Electricity | 0 | Active |
| US11502166B2 | Seal material for air gaps in semiconductor devices | Electricity | 0 | Active |
| US10461079B2 | Method and device of preventing merging of resist-protection-oxide (RPO) between adjacent structures | Electricity | 0 | Active |
| US11942358B2 | Low thermal budget dielectric for semiconductor devices | Electricity | 0 | Active |
| US12308312B2 | Interconnect structure and method for manufacturing the interconnect structure | Electricity | 0 | Active |
| US12363980B2 | Spacer structure for semiconductor device | Electricity | 0 | Active |
| US11848238B2 | Methods for manufacturing semiconductor devices with tunable low-k inner air spacers | Electricity | 0 | Active |
| US11480606B2 | In-line device electrical property estimating method and test structure of the same | Electricity | 0 | Active |
| US11257753B2 | Interconnect structure and method for manufacturing the interconnect structure | Electricity | 0 | Active |
| US12412779B2 | Bilayer seal material for air gaps in semiconductor devices | Electricity | 0 | Active |
| US11901220B2 | Bilayer seal material for air gaps in semiconductor devices | Electricity | 0 | Active |
| US11637062B2 | Interconnect structure and method for manufacturing the interconnect structure | Electricity | 0 | Active |
| US9496398B2 | Epitaxial source/drain regions in FinFETs and methods for forming the same | Electricity | 0 | Active |
| US12094952B2 | Air spacer formation with a spin-on dielectric material | Emerging Cross-Sectional Technologies | 0 | Active |
| US12324200B2 | Seal material for air gaps in semiconductor devices | Electricity | 0 | Active |
| US12360153B2 | In-line device electrical property estimating method and test structure of the same | Electricity | 0 | Active |
| US11063042B2 | Method and device of preventing merging of resist-protection-oxide (RPO) between adjacent structures | Electricity | 0 | Active |
| US12376321B2 | Semiconductor device with silicide structures surrounding epitaxial structures and method of making the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.