Split-gate flash memory cell and fabrication method thereof
US11437475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2021 |
| Grant date | Sep 6, 2022 |
| Priority date | — |
| Expiry date | Feb 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6892
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A split-gate flash memory cell includes a semiconductor substrate having thereon a select gate oxide layer and a floating gate oxide layer. A floating gate is disposed on the floating gate oxide layer. A football-shaped oxide layer is disposed on the floating gate. The floating gate includes tips under the football-shaped oxide layer. A select gate is disposed on the select gate oxide layer and extended onto the football-shaped oxide layer. An inter-poly oxide layer is between the select gate and the floating gate. The inter-poly oxide layer has a thickness smaller than a thickness of the select gate oxide layer. A source region is formed in the semiconductor substrate and adjacent to the floating gate. A drain region is formed in the semiconductor substrate and adjacent to the select gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.