Bias control for a memory device
US11442858B1 · kind B1 · utility
1Cited by
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33Claims
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Key dates
| Filing date | Mar 10, 2021 |
| Grant date | Sep 13, 2022 |
| Priority date | — |
| Expiry date | Mar 10, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1041
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for bias control for a memory device are described. A memory system may store indication of whether data is coherent. In some examples, the indication may be stored as metadata, where a first value indicates that the data is not coherent and a second value or a third value indicate that the data is coherent. When a processing unit or other component of the memory system processes a command to access data, the memory system may operate according to a device bias mode when the indication is the first value, and according to a host bias mode when the indication is the second value or the third value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.