Scheme to improve efficiency of garbage collection in cached flash translation layer
US11455245B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2017 |
| Grant date | Sep 27, 2022 |
| Priority date | — |
| Expiry date | Apr 12, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A variety of applications can include apparatus and/or methods of operating the apparatus in which storage in the memory device is managed. An allocation can include conducting a garbage collection procedure to free up one or more blocks. In various embodiments, execution of a garbage collection procedure can be based on operation of two tables with respect to a logical to physical mapping table split into logical to physical mapping table regions saved in the memory device. The first table can maintain counts of valid pages in blocks for a logical to physical mapping table region. The second table can include bits to identify logical to physical mapping table regions involved in the garbage collection procedure based on the entries in the first table. Search of the second table can determine logical to physical mapping table regions involved in the garbage collection. Additional apparatus, systems, and methods are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.