Patent · US Active

Method of lapping semiconductor wafer and semiconductor wafer

US11456168B2 · kind B2 · utility

0Cited by
2References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 1, 2017
Grant dateSep 27, 2022
Priority date
Expiry dateFeb 10, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/83
  • WIPO fieldMachine tools
  • WIPO sectorMechanical engineering

Abstract

Provided is a method of lapping a semiconductor wafer, which can suppress the formation of a ring-shaped pattern in a nanotopography map. The method of lapping a semiconductor wafer includes: a stopping step of stopping lapping of a semiconductor wafer; a reversing step of reversing surfaces of the semiconductor wafer facing a upper plate and a lower plate after the stopping step; and a resuming step of resuming lapping of the semiconductor wafer after the reversing step while maintaining the reversal of the surfaces facing the plates.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.