Semiconductor device manufacturing method and associated semiconductor die
US11469198B2 · kind B2 · utility
0Cited by
11References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 14, 2019 |
| Grant date | Oct 11, 2022 |
| Priority date | — |
| Expiry date | Mar 14, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device manufacturing method including: simultaneously forming a plurality of conductive bumps respectively on a plurality of formation sites by adjusting a forming factor in accordance with an environmental density associated with each formation site; wherein the plurality of conductive bumps including an inter-bump height uniformity smaller than a value, and the environmental density is determined by a number of neighboring formation sites around each formation site in a predetermined range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.