Automatic ESC bias compensation when using pulsed DC bias
US11476145B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2018 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Jan 20, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/32917
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a system for pulsed DC biasing and clamping a substrate. The system can include a plasma chamber having an ESC for supporting a substrate. An electrode is embedded in the ESC and is electrically coupled to a biasing and clamping circuit. The biasing and clamping circuit includes at least a shaped DC pulse voltage source and a clamping network. The clamping network includes a DC voltage source and a diode, and a resistor. The shaped DC pulse voltage source and the clamping network are connected in parallel. The biasing and clamping network automatically maintains a substantially constant clamping voltage, which is a voltage drop across the electrode and the substrate when the substrate is biased with pulsed DC voltage, leading to improved clamping of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.