Patent · US Active

Semiconductor device

US11476355B2 · kind B2 · utility

0Cited by
0References
11Claims
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Assignee

Inventors

Key dates

Filing dateMar 10, 2021
Grant dateOct 18, 2022
Priority date
Expiry dateApr 24, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/107
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device having IGBT, FWD and separate cell regions in a common semiconductor substrate, includes: a drift layer; a base layer; trench gate structures; an emitter region; a collector layer; a cathode layer; a first electrode; and a second electrode. The IGBT region having a first gate electrode in first and second IGBT trenches with a grid pattern is on the collector layer, and the FWD region with a second gate electrode in first and second FWD trenches with a grid pattern is on the cathode layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.