Dual side contact structures in semiconductor devices
US11482595B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2021 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Apr 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/364
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.