Methods for forming stacked layers and devices formed thereof
US11488858B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2020 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | May 8, 2040 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB82Y10/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes etching a semiconductor substrate to form a trench, with the semiconductor substrate having a sidewall facing the trench, and depositing a first semiconductor layer extending into the trench. The first semiconductor layer includes a first bottom portion at a bottom of the trench, and a first sidewall portion on the sidewall of the semiconductor substrate. The first sidewall portion is removed to reveal the sidewall of the semiconductor substrate. The method further includes depositing a second semiconductor layer extending into the trench, with the second semiconductor layer having a second bottom portion over the first bottom portion, and a second sidewall portion contacting the sidewall of the semiconductor substrate. The second sidewall portion is removed to reveal the sidewall of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.