High reliability semiconductor devices and methods of fabricating the same
US11488923B2 · kind B2 · utility
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3References
33Claims
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Key dates
| Filing date | May 24, 2019 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | Nov 26, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/35121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.