Method of manufacturing semiconductor structure having word line disposed over portion of an oxide-free dielectric material in the non-active region

US11488964B2 · kind B2 · utility

Assignee

• NANYA TECHNOLOGY CORPORATION · TW

Inventors

• Ching-Chia Huang · Taipei, TW
• Wei-Ming Liao · Taoyuan, TW

Key dates

• Filing date: Jul 9, 2021
• Grant date: Nov 1, 2022
• Expiry date: Jul 9, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/488

Abstract

A method of manufacturing a semiconductor structure includes: receiving a substrate having an active region and a non-active region adjacent to the active region; forming an etch stop layer over the non-active region of the substrate, in which the etch stop layer is oxide-free; forming an isolation over the etch stop layer; removing a portion of the active region and a portion of the isolation to form a first trench in the active region and a second trench over the etch stop layer, respectively, in which a thickness of the etch stop layer beneath the second trench is greater than a depth difference between the first trench and the second trench; forming a dielectric layer in the first trench; and filling a conductive material on the dielectric layer in the first trench and in the second trench. A semiconductor structure is also provided.