Resistive random access memory device and methods of fabrication

US11489112B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Namrata S. Asuri · Portland, US
• Oleg Golonzka · Beaverton, US
• Nathan Strutt · Beaverton, US
• Patrick J. Hentges · Portland, US
• Trinh T. Van · Hillsboro, US
• Hiten Kothari · Beaverton, US
• Ameya S. Chaudhari · Hillsboro, US
• Matthew John Andrus · Hillsboro, US
• Timothy E. Glassman · Portland, US
• Dragos Seghete · Portland, US
• Christopher J. Wiegand · Portland, US
• Daniel G. Ouellette · Portland, US

Key dates

• Filing date: Sep 28, 2017
• Grant date: Nov 1, 2022
• Expiry date: Sep 28, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An apparatus, includes an interconnect, including a conductive material, above a substrate and a resistive random access memory (RRAM) device coupled to the interconnect. The RRAM device includes an electrode structure above the interconnect, where an upper portion of the electrode structure has a first width. The RRAM device further includes a switching layer on the electrode structure, where the switching layer has the first width and an oxygen exchange layer, having a second width less than the first width, on a portion of the switching layer. The RRAM device further includes a top electrode above the oxygen exchange layer, where the top electrode has the second width and an encapsulation layer on a portion of the switching layer, where the switching layer extends along a sidewall of the oxygen exchange layer.