Semiconductor package device and method of manufacturing the same
US11495572B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2020 |
| Grant date | Nov 8, 2022 |
| Priority date | — |
| Expiry date | Jul 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/0401
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package device includes a transparent carrier, a first patterned conductive layer, a second patterned conductive layer, and a first insulation layer. The transparent carrier has a first surface, a second surface opposite to the first surface and a third surface extended between the first surface and the second surface. The first patterned conductive layer is disposed on the first surface of the transparent carrier. The first patterned conductive layer has a first surface coplanar with the third surface of the transparent carrier. The second patterned conductive layer is disposed on the first surface of the transparent carrier and electrically isolated from the first patterned conductive layer. The first insulation layer is disposed on the transparent carrier and covers the first patterned conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.