Patent · US Active

Analog mixed-signal assertion-based checker system

US11501050B1 · kind B1 · utility

2Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 16, 2021
Grant dateNov 15, 2022
Priority date
Expiry dateMar 4, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/02
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A design for an analog mixed-signal (AMS) circuit is accessed. An assertion for verifying the behavior of an analog signal in the AMS circuit is also accessed. The assertion is expressed in an assertion language for AMS circuits. A processor verifies the assertion against the predicted behavior of the analog signal in the AMS circuit. In various embodiments, the assertion language contains predefined classes for assertions in the temporal domain, for assertions in the frequency domain, and for assertions based on functional dependencies of an output analog signal on an input analog signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.