Tuning threshold voltage in nanosheet transitor devices
US11502168B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2020 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Apr 2, 2040 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB82Y10/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In some embodiments, the present disclosure relates to an integrated chip that includes a first nanosheet field effect transistor (NSFET). The first NSFET includes a first nanosheet channel structure arranged over a substrate, a second nanosheet channel structure arranged directly over the first nanosheet channel structure, and a first gate electrode structure. The first and second nanosheet channel structures extend in parallel between first and second source/drain regions. The first gate electrode structure includes a first conductive ring and a second conductive ring that completely surround outer sidewalls of the first nanosheet channel structure and the second nanosheet channel structure, respectively, and that comprise a first material. The first gate electrode structure also includes a passivation layer that completely surrounds the first and second conductive rings, is arranged directly between the first and second nanosheet channel structures, and comprises a second material different than the first material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.