Semiconductor device with backside power rail and methods of fabrication thereof
US11502201B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2020 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Nov 5, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0142
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device structure includes a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, a dielectric layer in contact with the second surface of the source/drain feature, a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature, and the second surface of the semiconductor layer is co-planar with the second surface of the source/drain feature, and a gate structure having a surface in contact with the first surface of the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.