Method for forming a crystalline protective polysilicon layer
US11508628B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2020 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Sep 15, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31133
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for forming a crystalline protective polysilicon layer which does not create defective voids during subsequent processes so as to provide effective protection to devices underneath. In one embodiment, a method for forming a semiconductor device, includes: depositing a protective coating on a first polysilicon layer; forming an epitaxial layer on the protective coating; and depositing a second polysilicon layer over the epitaxial layer, wherein the protective coating comprises a third polysilicon layer, wherein the third polysilicon layer is deposited at a first temperature in a range of 600-700 degree Celsius, and wherein the third polysilicon layer in the protect coating is configured to protect the first polysilicon layer when the second polysilicon layer is etched.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.