Semiconductor package structure and method for manufacturing the same
US11508655B2 · kind B2 · utility
1Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2020 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Jan 22, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package structure includes a semiconductor die and at least one pillar structure. The semiconductor die has an upper surface and includes at least one conductive pad disposed adjacent to the upper surface. The pillar structure is electrically connected to the conductive pad of the semiconductor die, and defines a recess portion recessed from a side surface of the pillar structure. A conductivity of the pillar structure is greater than a conductivity of the conductive pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.