Transistor including two-dimensional (2D) channel
US11508814B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2020 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Dec 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/511
Abstract
A transistor including at least one two-dimensional (2D) channel is disclosed. A transistor according to some example embodiments includes first to third electrodes separated from each other, and a channel layer that is in contact with the first and second electrodes, parallel to the third electrode, and includes at least one 2D channel. The at least one 2D channel includes at least two regions having different doping concentrations. A transistor according to some example embodiments includes: first to third electrodes separated from each other; a 2D channel layer that is in contact with the first and second electrodes and parallel to the third electrode; a first doping layer disposed under the 2D channel layer corresponding to the first electrode; and a second doping layer disposed under the 2D channel layer corresponding to the second electrode, wherein the first and second doping layers contact the 2D channel layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.