Patent · US Active

Wordline driver architecture

US11514979B2 · kind B2 · utility

0Cited by

2References

17Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Andy Wangkun Chen · Austin, US
Munish Kumar · Sindhar, IN
Ayush Kulshrestha · New Delhi, IN
Rajiv Kumar Sisodia · Bengaluru, IN
Yew Keong Chong · Austin, US
Kumaraswamy Ramanathan · Austin, US
Edward M. McCombs · Austin, US

Key dates

Filing date	Mar 31, 2021
Grant date	Nov 29, 2022
Priority date	—
Expiry date	Mar 31, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/1657
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various implementations described herein are related to a device with a wordline driver that provides a wordline signal to a wordline based on a row selection signal and a row clock signal. The device may have row selector logic that provides the row selection signal to the wordline driver based on first input signals in a periphery voltage domain. The device may also have level shifter circuitry that provides the row clock signal to the wordline driver in a core voltage domain based on second input signals in the periphery voltage domain.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.