Methods for forming conductive vias, and associated devices and systems

US11515204B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Trupti D. Gawai · Boise, US
• David S. Pratt · Meridian, US
• Ahmed M. Elsied · Boise, US
• David A. Kewley · Boise, US
• Dale W. Collins · Boise, US
• Raju Ahmed · Boise, US
• Chelsea M. Jordan · Boise, US
• Radhakrishna Kotti · Boise, US

Key dates

• Filing date: Dec 29, 2020
• Grant date: Nov 29, 2022
• Expiry date: Feb 12, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L23/5283
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods of manufacturing semiconductor devices, and associated systems and devices, are disclosed herein. In some embodiments, a method of manufacturing a semiconductor device includes forming an opening in an electrically insulative material at least partially over a first electrically conductive feature and a second electrically conductive feature. The method can further include forming a ring of electrically conductive material around a sidewall of the insulative material defining the opening, wherein the ring of electrically conductive material includes (a) a first via portion over the first electrically conductive feature, (b) a second via portion over the second electrically conductive feature, and (c) connecting portions extending between the first and second via portions. Finally, the method can include removing the connecting portions of the ring of electrically conductive material to electrically isolate the first via portion from the second via portion.